> Anyone have experience with Exemplar and Xilinx 4013s where it
> was only 80% utlilized but wouldn't route?
> In synopsys language, I think I need to increase the "porocity"
> of the design. I have other designs that are 90% and route, but
> for some reason this one is real bad.
> The design in nearly completely random logic. only 42 DFFs.
> I've tried all of the settings in Xilinx PPR, various seeds, max
> place & route effort... I even tried PPR on some of
> the less than optimal netlists from Exemplar. But still
> won't route.
> Any options that might help???
> We'll use the 4020 if we have too, but they're hard to get...
> The design is in VHDL. IOs are locked (don't get on my case here!!!
> unlocking the IOs only goes from about 200 to 100 unroutes).
> I tried synthesizing with another synthesizer but it came up with 105%
> utilization...
Don't use the "ungroup" switch or command - that causes a very dense
circuit which is nearly impossible to route. Try to use hierarchy, and
maintain it throughout the compile. Maybe try structuring and
multiple-output minimization to share logic elements (you get less
logic). Or, alternatively, try the flatten feature, and see what that
buys you.
I was having similar problems with a 5215 design. Now that I'm routing,
though, I can't seem to get acceptable timing. I found that the timing
is incredibly placement sensitive, and PPR is not very good at
placement, even with a high level of effort.
You may be forced to use the floorplanner to come up with a more
routable placement, and use the resulting LCA as a guidefile. This is
not a pretty option, due to possible iterations of this step due to
design changes, though.
A major problem that I see is that to do a synthesis followed by a place
and route takes about 6 hours for my design. That is too low a frequency
to try playing with different options. I currently have a Xilinx AE
helping me out to try to improve my timing. You may want to see if you
can get similar help.
Pat
________________________________________________________________________
Patrick McCabe | AT&T Paradyne
Ph: 813/530-8776 FAX: 813/532-5244 | Largo, FL 34649-2826
________________________________________________________________________
"Just because something doesn't do what you planned it to do doesn't
mean it's useless."
-- Thomas Edison.
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