Data Strobe Question about VC5402 and S5920

Data Strobe Question about VC5402 and S5920

Post by cww_winn » Sat, 17 Aug 2002 10:56:16

Hello, everybody!
I'm developing a PCI data acquisition target card using TMS320VC5402
and AMCC S5920. DSP will communicate with S5920 through HPI.
HPI strobe signals are designed as following:
DXFR# connects HDS1#
HDS2# connects Logic-1 level
HCS#  connects Logic-0 level
I'm anxious to know whether it will function correctly. Much obliged!!



1. help booting VC5402

I'm trying to make a test board for a design based on the
TMS320VC5402.  The boot procedure has me a little confused.

What I'd really like to do is hang nvSRAMS off the DSP directly, which
would contain the "current" application code (for parallel 16-bit PROM
boot, not running directly from external memory).  There would also be
a micro attached to the HPI port which would force new code into the
DSP's RAM, which could be written to obligingly install itself into
the nvSRAMS if needed.

Conceptually it sounds straightforward, but I have some questions.

1. Should the nvSRAMS be mapped into program space, data space, or

2. To provide a BRS word, would it be okay if all I/O reads returned
   the BRS word, provided I had no other I/O ports in the application?

3. Would it be sufficient to just use dipswitches and tristate buffers
   to map in a BRS word?

4. The documentation contains a flowchart describing the boot
   procedure with what looks like a typo.  Is the BRS word for 16-bit
   parallel PROM boot actually "xxxxxx10" (and not "xxxxxx00" as

5. If I want to force an HPI boot, is it sufficient to keep INT2
   asserted as the DSP goes out of reset, or must I echo HINT to
   INT2 as described in the docs?

In Electronics, no one things you're strange if you blow your PAL.

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