## Circuit help?

### Circuit help?

How do I design a circuit that can add and subtract two 4-bit two's
complement numbers and indicate overflow?

Can this be built from 1-bit components?

What are the inputs and the outputs?

TIA.

### Circuit help?

John E said...

Quote:> How do I design a circuit that can add and subtract two 4-bit two's
> complement numbers and indicate overflow?

> Can this be built from 1-bit components?

> What are the inputs and the outputs?

When is the homework due?

Casey

### Circuit help?

Quote:> John E said...
> > How do I design a circuit that can add and subtract two 4-bit two's
> > complement numbers and indicate overflow?

> > Can this be built from 1-bit components?

> > What are the inputs and the outputs?

> When is the homework due?

You give me a clue and I'll give you a clue...

### Circuit help?

> How do I design a circuit that can add and subtract two 4-bit two's
> complement numbers and indicate overflow?

I don't know how you do it.

Quote:> Can this be built from 1-bit components?

Yes, with suitable definition of 1-bit components.  What do you mean?

Quote:> What are the inputs and the outputs?

If you are asking, it sounds as though you haven't decided what you want

I suggest looking up the term "half adder" for information on designing

### Circuit help?

>How do I design a circuit that can add and subtract two 4-bit two's
>complement numbers and indicate overflow?

Quote:>Can this be built from 1-bit components?

Yes.

Quote:>What are the inputs and the outputs?

Two 4 bit two's compliment numbers, their sum and the overflow indication.
--

(303) 497-1211          P.O. Box 3000
Boulder, CO  80307

### Circuit help?

Quote:>> Can this be built from 1-bit components?
[...]
> I suggest looking up the term "half adder" for information on designing

Given the question it's clear they want a full 4bit adder based on full
1bit elements, not on 1/2 bit adders (which makes sense since you get to
use half as many 1bit elements, so it's half the size, latency, and power
consumption).

Stefan

### Circuit help?

83837.news.uni-berlin.de:

Quote:> How do I design a circuit that can add and subtract two 4-bit two's
> complement numbers and indicate overflow?

> Can this be built from 1-bit components?

> What are the inputs and the outputs?

> TIA.

### Circuit help?

> >How do I design a circuit that can add and subtract two 4-bit two's
> >complement numbers and indicate overflow?

> >Can this be built from 1-bit components?

> Yes.

> >What are the inputs and the outputs?

> Two 4 bit two's compliment numbers, their sum and the overflow indication.
> --

> (303) 497-1211  P.O. Box 3000
> Boulder, CO  80307

Here is the easy solution:  go to the library and find a really old Texas
Instruments TTL data book, with the gold covers from about 1970 or earlier.
Look up the 7481.  Copy to paper.  Turn in.

Plan B.  Write verilog for function.  synthesize.  print netlist.  turn in.

del cecchi

### Circuit help?

> How do I design a circuit that can add and subtract two 4-bit two's
> complement numbers and indicate overflow?

> Can this be built from 1-bit components?

> What are the inputs and the outputs?

> TIA.

Use a 256 entry ROM with 5-bits words

### Circuit help?

> >> Can this be built from 1-bit components?
> [...]
> > I suggest looking up the term "half adder" for information on designing

> Given the question it's clear they want a full 4bit adder based on full
> 1bit elements, not on 1/2 bit adders (which makes sense since you get to
> use half as many 1bit elements, so it's half the size, latency, and power
> consumption).

True.  I thought that half adder would be a good search term to find a
general discussion of adder circuits.  Once the OP gets a hit, he should
find lots of info on half adders, full adders, carry circuits, etc., to
keep him entertained for a while.

### Circuit help?

Quote:> > How do I design a circuit that can add and subtract two 4-bit two's
> > complement numbers and indicate overflow?

> > Can this be built from 1-bit components?

> > What are the inputs and the outputs?

> > TIA.

> Use a 256 entry ROM with 5-bits words

That's a great idea.  But doesn't he need either 10 bits or 512 entries to
handle the add/subtract requirement?.  Or he could make the 512 entry truth
table and run quine-mcclusky minimization.  I'll bet there is one of those
available on the net.

del cecchi

### Circuit help?

>>>How do I design a circuit that can add and subtract two 4-bit two's
>>>complement numbers and indicate overflow?

>>>Can this be built from 1-bit components?

>>Yes.

>>>What are the inputs and the outputs?

>>Two 4 bit two's compliment numbers, their sum and the overflow indication.
>>--

>>(303) 497-1211  P.O. Box 3000
>>Boulder, CO  80307

> Here is the easy solution:  go to the library and find a really old Texas
> Instruments TTL data book, with the gold covers from about 1970 or earlier.
> Look up the 7481.  Copy to paper.  Turn in.

> Plan B.  Write verilog for function.  synthesize.  print netlist.  turn in.

> del cecchi

Or a more recent CMOS book and look up 74HC181. Look at logic diagram.
Delete parts you don't need. Turn in.

### Circuit help?

Quote:> <snip!>

> 4 full adders wires in parallel.

Would one half-adder (for the LSB) with three full-adders not be a
preferable solution as there will be no carry input for the LSB?

Quote:> Now do your own homework.

OK, sir.

### Circuit help?

> > How do I design a circuit that can add and subtract two 4-bit two's
> > complement numbers and indicate overflow?

> I don't know how you do it.

OK, thanks.

Quote:> > Can this be built from 1-bit components?

> Yes, with suitable definition of 1-bit components.  What do you mean?

What exactly would be a "normal" definition of 1-bit components? Would that
typically just mean AND gates, OR gates etc? If so I'm assuming that since
half & full adders consist of such components then the answer to my original
question is obviously 'yes'..?

### Circuit help?

On Wed, 10 Mar 2004 01:24:44 -0000, the renowned "John E"

>> <snip!>

>> 4 full adders wires in parallel.

>Would one half-adder (for the LSB) with three full-adders not be a
>preferable solution as there will be no carry input for the LSB?

Dig deeper and don't guess.

Best regards,
Spehro Pefhany
--
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