How to generate a CSA tree?

How to generate a CSA tree?

Post by Sleep Mod » Tue, 13 Jan 2004 17:19:01

Hi all,

I am trying to design a 16-bit integer multiplier in VHDL and I want to use
a Carry-Save-Adder (CSA) tree for generating the interim subproducts
and -then- with an additional CPA (or other) adder to add them to the final
32-bit product; i.e. I want to build a full-tree multiplier.

My question is whether there is some automatic (core) generator for the
CSA-tree interconnections since it is rather complicated to do it by hand...
If not, is there any fast method of drawing it manually (pen-and-paper) so
that I can translate it to VHDL later on?

Thanks in advance guys,


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