Very Computer

I have a question which you might be able to help me with:

I am looking for algorithms which enable me to model a predefined architecture
and thus enable me to find the P, T, and A characteristics. The architecture is
generated by Sagantec's ASA 6.0 compiler/generator.

Below are some ideas I have on how to tackle the problem. Any ideas, comments,
questions, etc. would be gladly recieved.

Thanks,

Marcel

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Area:

- from the SID file a unit tree can be obtained, i.e. which unit uses which
others.
- for leaf cells, we need to find (by experiment?) the area as a function of the
architecture parameters
- for non-leaf cells, we calculate the areas of the sub-modules and add these
with a suitable whitespace/routing factor. How do we obtain this factor (and is
it a function of the parameter architectures?)
- for cells which we have calculated, we store the results in a database for easy
reference later on.

Timing:

We need to work out a register-register cyclic tree.

- from this we can calculate the critical path as being the longest path between
two registers, an input and a register, or an output and a register.
- we would need to calculate the timing delays for each unit (as a function of
the parameters)

Power:

I really have no good ideas on how to model the power dissipation of the
generated architecture.