Quote:>->>AFAIK, mask is totally dependent on your configuration. If there are
>->>memory blocks you don't want to be DMA-accessible (i.e. 2632 memory
>->>strapped on a 2630 accelerator), you have to set mask to reject that
>Please ... once and for all ... tell us all what the F, E, and C will map out
>or not map out in the mask setting?
What follows is a long-winded and hopefully minimally-inaccurate
explanation of how mask works. If anyone sees any problems with this,
PLEASE write me! I don't want to give anyone a wrong answer, and I'd
like to know of mistakes for my own benefit.
OK. Here is my understanding of the problem, based on a DMA FAQ
Before the controller does a DMA write to memory, it has to be able to
tell what locations are suitable for use. This is where mask comes in.
The OS takes the binary inverse of mask and ANDs it with the mem. loc.
in question. If the answer is 0, then the location is OK to use.
For simplicity, imagine that you have a computer with a 16-bit addressing
range. In this case, memory would run in the range of 0x0000 to 0xFFFF.
Suppose that the mask setting in this system is 0x1FFF. In binary, this
a) 0001 1111 1111 1111
b) 1110 0000 0000 0000
Say you want to know if 0x0123 is good for DMA. You take:
0000 0001 0010 0011 (0x0123) and AND it with
1110 0000 0000 0000 (b above) to get
0000 0000 0000 0000 = 0. Therefore, 0x0123 is OK for DMA.
How about 0x3000?
0011 0000 0000 0000 (0x3000), ANDed with
1110 0000 0000 0000 (part b again) results in
0010 0000 0000 0000 != 0. So 0x3000 won't work.
So, we want a mask that will allow our controller to access all of
our DMA-compatible memory, but nothing else. After all that above,
this is actually the easy part. As an example, here are the addresses
of the memory blocks in my 2500.
0x0780 0000 - 0x07FF FFFF - 8 meg on my 2632
0x0020 0000 - 0x005F FFFF - 4 meg on my 2630
0x0000 0400 - 0x000F FFFF - 1 meg chip mem
My RapidFire-II controller can DMA to the 2630 and chip memory banks,
but not the 2632's non-Auto-config memory. I need a mask that will
accept all values up to 0x5FFFFF, but none of the memory above.
Piece o' cake: the magic number for a mask that does that is 0x5FFFFF.
This is ALMOST the final answer. We still need to decide how to set the
Given this, let's see how the last 8 bits of mask would work out for
F, E, and C:
0xF = 1111 1111, inverted = 0000 0000
0xE = 1111 1110, inverted = 0000 0001
0xC = 1111 1100, inverted = 0000 0011
Because of this, a last digit of F won't block out ANY addresses because
of the last 8 bits of the address (any number AND 0 = 0). However, E
will block any addresses ending with a rightmost bit of 1 (for example,
any odd addresses). C takes this further. It wont pass any address
ending in 01, 10, or 11. This negates any addresses that aren't
Many (most? all?) SCSI controllers DMA MUCH faster into long-aligned
memory blocks, so we'll want to make our mask accept only long-aligned
addresses. To do this, I just take my basic mask setting from above
(0x5FFFFF) and change the last digit to C, giving 0x5FFFFC. Voila!
To conclude: take the highest memory address you know your system can
use for DMA, and change the last digit to C. Use HDToolBox, RDPrep, etc.
to make this your mask setting, and you're good to go.
I'm sorry for such a long posting. However, when I went looking for
this information a little while back, I couldn't find it to save my
life. A lot of people get mad when someone asks these questions, but
if noone ever answers, what are they supposed to do? I hope this helps
someone. If you have any questions, feel free to e-mail me (preferably
including output from ShowConfig).
www.gxl.com/~kstrauser/ | Team AMIGA \X/ | "Thanks! Wanna bite?"