Quote:> Slightly off topic but still related: I read that the P4 has a slight
> flaw compared to an AMD with similar specs. It turns out that the
> point processor that handles non-integer values is rather lacking in the
> the integer calculations are well up there. This has been (to my
> explination for why 1 GHZ AMD chips outperform (by a good percentage) 1.5
> P4's in certain benchmarks but the P4 catches up in others.
The P4 is a strange beast... Most current benchmarks will show that the P4
doesn't lag behind an Athlon or at least not by much and software that is
optimized for it really shows a serious increase in speed. The catch right
now is there aren't any commercially available compilers that are optimized
for it so any optimizations have to be hard-coded through assembly language
and then the comilers have to be told not to try and optimize or produce
errors for that code. ...And that's using hacked or re-written compiler
cores that can generate some of the new instructions.
What's cool about the P4 is that externally it currently runs on a 100MHz
bus, but uses a quad data rate method to achieve 400MHz capability.
Internally, the chip has the ability to run the ALU at *DOUBLE* the CPU
internal clock, so on a 1.5GHz P4, the ALU runs at 3GHz! Unfortunately, the
FPU is still set at the standard internal clock and to compilers not
optimized for the P4, it appears the same as the FPU in the P3. Going back
to the 3GHz ALU, it's nice, but Intel didn't increase the width of the cache
interface from the P3, so there can be a bottleneck there with the speed
difference. Also, the compiler issue strikes again here in that unless a
compiler knows about the new ALU scheduling and how and when it can feed and
pull data into the integer pipeline, the thing just sits there spinning its
wheels and in some cases with unoptimized software, it can even run slower
than a similarly clocked P3. Future revisions of the P4 should see a double
clocked FPU inside as well as a wider cache interface. We'll also see QDR
on the 133MHz FSB with the next revision for an effective 533MHz FSB.
Intel did a lot of cool things with the P4, but it's up to the rest of the
world to support these new features and so far it's not happening... But
this is also the biggest advancement and change in the X86 architecture
since the jump to 32bit (and it's probably a bigger advancement than that)
so it will take some time. The upcoming Mustang Athlons will have the edge
in both price and performance over the P4 until we see P4-optimized
compilers, but then the performance should shift in favor of Intel...
Although, Intel is going to need to seriously adjust their attitude as well
as their prices if they want to compete against the next wave of AMD CPUs
when we see SMP and faster copper cores among other things.
I'm kinda worried that the P4 is going to go the way of the '386. It's a
huge advancement over the previous model, but the hardware and mostly the
software need to radically change to support it. By the time the software
catches up with the P4, the P5 will be available and most of the world will
have passed on the P4. ...Just like with the 386. Some people ran out to
buy one, but then sat there while all there 16bit software still ran about
the same, or up to 2X as fast just because the 386 was clocked faster. It
wasn't until 32bit compilers showed up and really started taking advantage
of the extra 386 instructions did anyone see an improvement, but by then the
486 was available and became the next logical jump for most PC owners from
their 286 systems. This need for advancement combined with AMD producing
chips that will increase performance without calling for re-optimizing
compilers for a new architecture, will probably hurt Intel's hold on the
market. Which is a good thing, competition brings faster progression of
- Jeff Kilgroe | Change the .nospam to .com to reply!
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