ECC/Parity interrupt handled?

ECC/Parity interrupt handled?

Post by Henry C. Bar » Mon, 09 Dec 1996 04:00:00



    I have heard that the ECC circuitry on some newer chipsets
    (Such as the Natoma used with the PPro) generate an interrupt
    when a single bit error is corrected. If this is true, how will
    Linux (2.0.x) kernels react to this interrupt?

    E.G. Will a 'parity error corrected' result in an 'unexpected
    interrupt' halt instead of a 'parity error system halted'
    condition of will the kernel go its happy way without ever
    letting me know there was an error?

    thanks,
    hank

--
Hank Barta                              White Oak Software Inc.

                Beautiful Sunny Winfield, Illinois

 
 
 

ECC/Parity interrupt handled?

Post by Peter J. Vessen » Mon, 09 Dec 1996 04:00:00


Check out the last 10 or so linux kernel digests for some discussion on
this and related memory error issues.


>    I have heard that the ECC circuitry on some newer chipsets
>    (Such as the Natoma used with the PPro) generate an interrupt
>    when a single bit error is corrected. If this is true, how will
>    Linux (2.0.x) kernels react to this interrupt?

>    E.G. Will a 'parity error corrected' result in an 'unexpected
>    interrupt' halt instead of a 'parity error system halted'
>    condition of will the kernel go its happy way without ever
>    letting me know there was an error?

>    thanks,
>    hank

>--
>Hank Barta                              White Oak Software Inc.

>            Beautiful Sunny Winfield, Illinois

--

| Stolen from: Peter J. Vessenes, Box 4294 Brown University, Pr. RI 02912      |
| finger for pgpkey (Do not be mistaken. This is not your father's server.)    |
| Unsolicited commercial e-mail will be treated as harrassment.                |


 
 
 

ECC/Parity interrupt handled?

Post by bill davids » Wed, 11 Dec 1996 04:00:00




| Check out the last 10 or so linux kernel digests for some discussion on
| this and related memory error issues.

There's a helpful answer to a question requiring a one line
answer... He didn't ask for the philosophy, just the result.


| >    I have heard that the ECC circuitry on some newer chipsets
| >    (Such as the Natoma used with the PPro) generate an interrupt
| >    when a single bit error is corrected. If this is true, how will
| >    Linux (2.0.x) kernels react to this interrupt?
| >
| >    E.G. Will a 'parity error corrected' result in an 'unexpected
| >    interrupt' halt instead of a 'parity error system halted'
| >    condition of will the kernel go its happy way without ever
| >    letting me know there was an error?

Don't have a way to generate this to tell you, sorry.
--

  What do you mean I shouldn't do thing like that at my age?
  At my age if you don't do things like that you might die of natural causes!

 
 
 

1. Question: how does Linux handle Parity/ECC errors?

I am considering getting a Triton II motherboard for ECC memory checking.

Does anyone know if there are any Linux-specific issues about Parity/ECC
memory checking?  In particular, will the system record if there is a memory
error, or will it just crash and give a BIOS error?  Also, is there any way to
verify that memory checking is actually enabled on the system (on both the
hardware and software sides)?

Thank-you for any information,
        Richard.

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