1. Total store order and partial store order
Hi,
I recently read a description of the SPARC V.8 multi-processor
family that described it as providing both "total store order" and
"partial store order" memory cache consistency semantics. I was a
little unclear what this meant and wonder if anyone can clarify the
two concepts and explain how the SPARC could provide them both?
As I understand it, with total store order semantics, reading
a variable that is being accessed by threads on different CPUs may not
be serialized with simultaneous writes to the same variable by threads
on other CPUs. Likewise, with partial store order semantics, writes
may also not be serialized with other writes. In either case,
expressions that require more than a single load or store of a memory
location (such as foo++ or i = i - 10) may produce inconsistent
results due to cache latencies across CPUs.
Basically, to ensure that reads and writes of variables shared
between threads are updated correctly, programmers must manually
enforce the order that changes to these variables become globally
visible, e.g., by using the SunOS 5.x mutex_t mechanism.
What I am not sure about is whether "total store order" and
"partial store order" are mutually exclusive properties of a
multi-processor cache consistency architecture and whether an
administrator can "select" between the technique used.
Thanks for any insights,
Doug
--
Douglas C. Schmidt
Department of Information and Computer Science
University of California, Irvine
Irvine, CA 92717. Work #: (714) 856-4105; FAX #: (714) 856-4056
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