PCI cache line messages 2.4/2.5

PCI cache line messages 2.4/2.5

Post by Jeff Garzi » Fri, 06 Jun 2003 00:50:08




> Getting this with 2.5.70(-bk)  :
> PCI: cache line size of 128 is not supported by device 00:1d.7

> and this with 2.4.2(0,1,pre,rc) :
> PCI: 00:1d.7 PCI cache line size set incorrectly (0 bytes) by BIOS/FW.
> PCI: 00:1d.7 PCI cache line size corrected to 128.

> This is the onboard USB EHCI (Intel D845 PESV).
> lspci below.

> What's going on ?

Pretty much exactly what the message says :)

Your BIOS did not set the PCI cache line size correctly.  The kernel
caught that mistake, and fixed it.

        Jeff

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PCI cache line messages 2.4/2.5

Post by Margit Schubert-Whi » Fri, 06 Jun 2003 08:20:07


 > Jeff Garzik wrote :
 > Your BIOS did not set the PCI cache line size correctly.

Well, 2 questions :
2.4 gets 0 and sets 128. 2.5 gets 128 and reports it wrong.
This seems a contradiction. Which is right ?
Why only this port on the (onboard) USB hub ?

Margit

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PCI cache line messages 2.4/2.5

Post by Alan Co » Fri, 06 Jun 2003 12:50:07



Quote:> > PCI: 00:1d.7 PCI cache line size set incorrectly (0 bytes) by BIOS/FW.
> > PCI: 00:1d.7 PCI cache line size corrected to 128.

> > This is the onboard USB EHCI (Intel D845 PESV).
> > lspci below.

> > What's going on ?

> Pretty much exactly what the message says :)

> Your BIOS did not set the PCI cache line size correctly.  The kernel
> caught that mistake, and fixed it.

I can't find anywhere the BIOS is obliged to set it for you if a PnP OS
is installed, ditto in the presence of any form of hotplug the test is
wrong.

As far as I can see you can only warn if MWI is already set in the
control word, and (I'd have to check the spec) possibly if the
cache line size is non zero.

(simple hotplug thought experiment to prove the point

        Soft boot a thinkpad 600
        As the bios transfers to grub insert in docking station

explain how the bios sets the cache line size..)

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PCI cache line messages 2.4/2.5

Post by David S. Mille » Fri, 06 Jun 2003 13:10:12



> > Your BIOS did not set the PCI cache line size correctly.  The kernel
> > caught that mistake, and fixed it.

> I can't find anywhere the BIOS is obliged to set it for you if a PnP OS
> is installed, ditto in the presence of any form of hotplug the test is
> wrong.

> As far as I can see you can only warn if MWI is already set in the
> control word, and (I'd have to check the spec) possibly if the
> cache line size is non zero.

I don't know how PnP OS plays into it, but the last time I dug into this
deep dark area, the BIOS was expected to setup the cache line size for
all PCI devices in the system.

I do specifically remember situations, involving Acenic cards, where
one Acenic card would have things setup correctly but for whatever
reason the BIOS decided not to init the other Acenic cards.

--

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PCI cache line messages 2.4/2.5

Post by Alan Co » Fri, 06 Jun 2003 13:30:13



Quote:> I don't know how PnP OS plays into it, but the last time I dug into this
> deep dark area, the BIOS was expected to setup the cache line size for
> all PCI devices in the system.

With a non PnP OS the BIOS is supposed to have done a lot of the setup
for things like IRQ routing. With a PnP OS (and nowdays thats often not
even a selectable but a wired in property) the OS has to do a lot of
the work.

And then there is hotplug

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PCI cache line messages 2.4/2.5

Post by David S. Mille » Fri, 06 Jun 2003 13:30:18



   Date: 05 Jun 2003 12:20:12 +0100

   And then there is hotplug

My understanding is that the bioses do the cacheline, irq,
etc. assignment via BIOS callbacks done by the PCI controller hotplug
driver.

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PCI cache line messages 2.4/2.5

Post by Margit Schubert-Whi » Fri, 06 Jun 2003 17:30:22


 > Ivan wrote :
 > 2.5 and BIOS are correct, 2.4 is not.

With what (if any) consequences under 2.4 ?
Shouldn't it be fixed for 2.4.21 ?

Margit

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PCI cache line messages 2.4/2.5

Post by Alan Co » Fri, 06 Jun 2003 22:00:12




>    Date: 05 Jun 2003 12:20:12 +0100

>    And then there is hotplug

> My understanding is that the bioses do the cacheline, irq,
> etc. assignment via BIOS callbacks done by the PCI controller hotplug
> driver.

Ah cloud cuckoo land 8)

Come on down Dave ;)

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PCI cache line messages 2.4/2.5

Post by David S. Mille » Sat, 07 Jun 2003 07:20:07



   Date: 05 Jun 2003 20:48:42 +0100


   > My understanding is that the bioses do the cacheline, irq,
   > etc. assignment via BIOS callbacks done by the PCI controller hotplug
   > driver.

   Ah cloud cuckoo land 8)

First, can I get some english without the welsh grammar? :-)
Second, BIOS callbacks are exactly what I see the compaq hotplug
PCI driver doing.

   Come on down Dave ;)

:)
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PCI cache line messages 2.4/2.5

Post by Ivan Kokshaysk » Sat, 07 Jun 2003 14:10:10



> With what (if any) consequences under 2.4 ?
> Shouldn't it be fixed for 2.4.21 ?

More likely for early 2.4.22-pre. In the worst case you'd
end up enabling MWI with cacheline size = 0, which
should be a no-op on any sane hardware.

Ivan.
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PCI cache line messages 2.4/2.5

Post by Alan Co » Sat, 07 Jun 2003 17:40:08



Quote:> First, can I get some english without the welsh grammar? :-)
> Second, BIOS callbacks are exactly what I see the compaq hotplug
> PCI driver doing.

The compaq driver isnt loaded at this point. There is a window of
opportunity

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PCI cache line messages 2.4/2.5

Post by David S. Mille » Sat, 07 Jun 2003 17:40:09



   Date: 06 Jun 2003 16:27:48 +0100

   The compaq driver isnt loaded at this point. There is a window of
   opportunity

Point.  But %99 of the time it's the dang BIOS doing something wrong.
We SHOULD take care of that case, and whether it's nice to log a
message about it or not is a seperate matter.
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