Bus arbitrator and lock implementation

Bus arbitrator and lock implementation

Post by Subbiah Sundar » Sat, 26 Dec 1992 01:53:48



I would like to know the way locks are implemented in systems
like the Encore. I want the hardware details and the way it works.
It would be nice if someone could point out to me a good reference
material on this topic. I would also like to know more about
bus arbitrator design. (In particular I would like to know about
the bus arbitrator implementations on shared memory parallel
machines.(Books, papers, articles, etc.))

Thanks,
Subbiah.