makefile when SRC dir and OBJ dir differs?

makefile when SRC dir and OBJ dir differs?

Post by Ahn Ki-yun » Tue, 18 Mar 2003 15:03:30



Suffix rules only work when target and prerequisite are
in the same directory. But sometimes you want the object
files to be generated in some other directory since
directory gets messy and it makes you hard to see the
list of source files.

What may be a good solution to this ?
Is there any way doing this with suffix rules ?

Any good ideas / sugestoins are welcomed.

Thanks.

 
 
 

makefile when SRC dir and OBJ dir differs?

Post by Derk Gwe » Wed, 19 Mar 2003 16:49:20


# Suffix rules only work when target and prerequisite are
# in the same directory. But sometimes you want the object
# files to be generated in some other directory since
# directory gets messy and it makes you hard to see the
# list of source files.
#
# What may be a good solution to this ?
# Is there any way doing this with suffix rules ?

I will repeat my same answer in happy knowledge that it will be ignored.

Write a script that when run creates a makefile and calls make.

#!/bin/tclsh

set makefile /usr/tmp/[pid]-[clock seconds]-make
set OBJ $env(OBJ)
set SRC $env(SRC)

set ch [open $makefile w]
puts $ch "OBJ=$OBJ"
puts $ch "SRC=$SRC"

foreach src [glob [file join $SRC *]] {
  set obj [file join $OBJ [file tail $fn]]
  set includes [join [exec grep {#[ \t]*include} $src | sed {s/#include //;s/"//g}] " "]
  puts $ch "$obj: $src $includes"
  puts $ch "       cc -o $obj ... whatever ... $src"

Quote:}

close $ch

set ec [catch {exec make $makefile} rs]
file delete $makefile
puts $rs
exit $ec

--
Derk Gwen http://derkgwen.250free.com/html/index.html
Who's leading this mob?

 
 
 

makefile when SRC dir and OBJ dir differs?

Post by Paul D. Smit » Wed, 19 Mar 2003 04:57:37



  ak> Suffix rules only work when target and prerequisite are in the
  ak> same directory. But sometimes you want the object files to be
  ak> generated in some other directory since directory gets messy and
  ak> it makes you hard to see the list of source files.

  ak> What may be a good solution to this ?  Is there any way doing this
  ak> with suffix rules ?

The only way to do it with suffix rules is if your version of make
supports VPATH.  Then you can add the source directory to VPATH, and run
your build from the object directory.

  ak> Any good ideas / sugestoins are welcomed.

Alternatively you can switch to GNU make, or some other make, that
supports more flexible implicit rules: GNU make has pattern rules which
can look like:

  $(OBJDIR)/%.o : $(SRCDIR)/%.c

etc.

--
-------------------------------------------------------------------------------

 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist

 
 
 

makefile when SRC dir and OBJ dir differs?

Post by Valentin Nechaye » Thu, 20 Mar 2003 15:16:39


AKy> Suffix rules only work when target and prerequisite are
AKy> in the same directory. But sometimes you want the object
AKy> files to be generated in some other directory since
AKy> directory gets messy and it makes you hard to see the
AKy> list of source files.
AKy> What may be a good solution to this ?
AKy> Is there any way doing this with suffix rules ?

If you get BSD make, this is made almost automatically.
The approach working with all make variations is to create object directory
and make symlinks (or even real copy, but this is superfluous) for source
files from it to real source directory. You can see this approach in sendmail
(better to watch it on results, not on making scheme, which is rather
complicated) or exim, and also in FreeBSD kernel compilation. Sendmail
and exim create separate object directory for each architecture
(including minor system version), so building can be made on shared
file system without conflicts.

-netch-