# Suffix rules only work when target and prerequisite are
# in the same directory. But sometimes you want the object
# files to be generated in some other directory since
# directory gets messy and it makes you hard to see the
# list of source files.
#
# What may be a good solution to this ?
# Is there any way doing this with suffix rules ?
I will repeat my same answer in happy knowledge that it will be ignored.
Write a script that when run creates a makefile and calls make.
#!/bin/tclsh
set makefile /usr/tmp/[pid]-[clock seconds]-make
set OBJ $env(OBJ)
set SRC $env(SRC)
set ch [open $makefile w]
puts $ch "OBJ=$OBJ"
puts $ch "SRC=$SRC"
foreach src [glob [file join $SRC *]] {
set obj [file join $OBJ [file tail $fn]]
set includes [join [exec grep {#[ \t]*include} $src | sed {s/#include //;s/"//g}] " "]
puts $ch "$obj: $src $includes"
puts $ch " cc -o $obj ... whatever ... $src"
Quote:}
close $ch
set ec [catch {exec make $makefile} rs]
file delete $makefile
puts $rs
exit $ec
--
Derk Gwen http://derkgwen.250free.com/html/index.html
Who's leading this mob?