Very Computer

1. Makefiles targets and "generated" prerequisites

I have a situation that I cannot solve.
Having a series of targets that should build the same way (ie the same
rule) but for which I cannot use static patterns, default rules, etc.
how do I do it?

## Suppose the list is:

TARGETS_LIST = a.b c.d d.e f.g
SRCDIR = some_path

## Where a.b depends on $(SRCDIR)/a and $(SRCDIR)/b and so on
## Can I write something like the following (first prerequisites takes
the name, the second the extension)?

$(TARGETS_LIST): $(SRCDIR)/$(basename $2) \

calculated?
Is there a simpler or saner way of doing this?

Thanks,
JF

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