Configuring PCI<-->PCI bridges behind Cardbus bridges

Configuring PCI<-->PCI bridges behind Cardbus bridges

Post by Cathal Curt » Wed, 14 May 2003 02:29:04

Can you offer me some help?
I have been asked to write a linux driver for a box
that contains two PCI slots.
The PCI bus topology looks like

  PCIBus (an arbitrary bus south of the host bus)
  PCI<-->Cardbus Bridge (offers 1/2 pcmcia slots)
  PCI<-->PCI Bridge (contained inside a cardbus card)
  PCI<-->PCI Bridge
      ^    ^
      |    |
      v    v
   slot0  slot1

I have read and stepped through the PCI code in the kernel
trying to figure out how to:
a) configure the bus numbers of the 3 bridges (cardbus, and
   the two PCI bridges)
b) configure the Base address registers of the devices in
   slot0 and slot1
c) configure the memory windows of the three bridges

My understanding at the moment is that the BIOS configures
these devices at power-on reset and the kernel reads the
config registers and allocates resources etc. Nowhere have
I seen the kernel code write to the bus registers, the base
address registers or to the bridge window registers.

I have managed (in a very hacky way) to configure the
primary, secondary and subordinate bus numbers of the
bridges inside a kernel module.

Prior to hacking the memory space windows of the bridges
I was getting segmentation faults (obviously my read/write
operations were not making it through the bridges).
The bridge memory space windows I managed to configure (I
don't know if I got them right or not though) using
setpci -s bus:device.func .....
But when I perform reads and writes to the device, inserted in
one of the slots, I get all f's (0xffffffff) for every

Admittedly I have not written a Cardbus compliant driver yet.
I am initially just trying to get one of our PCI cards working
in one of the slots in the above topology in anyway possible.

Can you offer me some help/direction on how best to:
a) scan for buses, bridges and devices behind a cardbus
b) allocate kernel resources for the same
c) configure the bus register, base address registers and
   bridge windows

I was hoping to find functions within the kernel that
would do these for me but after a number of weeks I cannot
say for sure exactly what should be done.

Any assistance, help and direction would be greatly

Cathal Curtis.


1. PATCH: Fix CardBus bridge behind a PCI bridge

Here is a patch against 2.4.18 to fix CardBus bridge behind a PCI
bridge with positive decode. I checked Windows XP. It is how it
allocates resources for the CardBus slots, that is outside of
the memory and I/O windows on the PCI bridge.

Let me know if it works for you.


1K Download

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