Cpuinfo Flags

Cpuinfo Flags

Post by Raymond Leroy Walk » Tue, 07 Jul 1998 04:00:00



Does anyone know where I can find out what the flags in "/proc/cpuinfo" mean?

processor       : 0
cpu             : 586
model           : Pentium 75+
vendor_id       : GenuineIntel
stepping        : 5
fdiv_bug        : no
hlt_bug         : no
fpu             : yes
fpu_exception   : yes
cpuid           : yes
wp              : yes
flags           : fpu vme de pse tsc msr mce cx8
bogomips        : 39.94

I'm pretty sure about the 'fpu' flag, but other than that I'm not really sure.
I have looked around for the answer, but I have not found it yet.

--
Brother Floyd                          "Today is a good day to die."
The High Believer                      "Do you believe?"

 
 
 

Cpuinfo Flags

Post by Stephen Richard FREELA » Wed, 08 Jul 1998 04:00:00



: Does anyone know where I can find out what the flags in "/proc/cpuinfo"
: mean?
        Thanks for setting me onto a fascinating hunt through the kernel
source!  It took me about half an hour to track down this information to an
Intel document regarding the "cpuid" instruction, which does exactly what it
sounds like it should.  If you're interested, go get:

        http://developer.intel.com/design/celeron/applnots/24161809.pdf

        The relevant information is in Table 5, que voici.

Table 5. Feature Flag Values

Bit     Name    Description     Comments
                when Flag = 1
0       FPU     Floating-point  The processor contains an FPU that supports
                unit on-chip    the Intel 387 floating-point instruction
                                set.
1       VME     Virtual Mode    The processor supports extensions to
                Extension       virtual-8086 mode.
2       DE      Debugging       The processor supports I/O breakpoints,
                Extension       including the CR4.DE bit for enabling debug
                                extensions and optional trapping of access
                                to the DR4 and DR5 registers.
3       PSE     Page Size       The processor supports 4-Mbyte pages.
                Extension
4       TSC     Time Stamp      The RDTSC instruction is supported including
                Counter         the CR4.TSD bit for access/privilege control.
5       MSR     Model Specific  Model Specific Registers are implemented with
                Registers       the RDMSR, WRMSR instructions
6       PAE     Physical        Physical addresses greater than 32 bits
                Address         are supported.
                Extension
7       MCE     Machine Check   Machine Check Exception, Exception 18, and
                Exception       the CR4.MCE enable bit are supported
8       CX8     CMPXCHG8        The compare and exchange 8 bytes instruction
                Instruction     is supported.
                Supported
9       APIC    On-chip APIC    The processor contains a local APIC.
                Hardware
                Supported (1)
10              Reserved        Do not count on their value.
11      SEP     Fast System     Indicates whether the processor supports the
                Call            Fast System Call instructions, SYSENTER and
                                SYSEXIT. NOTE: Refer to Section 3.5 for
                                further information regarding SYSENTER/
                                SYSEXIT feature and SEP feature bit.
12      MTRR    Memory Type     The Processor supports the Memory Type Range
                Range Registers Registers specifically the MTRR_CAP register.
13      PGE     Page Global     The global bit in the PDEs and PTEs and the
                Enable          CR4.PGE enable bit are supported.
14      MCA     Machine Check   The Machine Check Architecture is supported,
                Architecture    specifically the MCG_CAP register.
15      CMOV    Conditional     The processor supports CMOVcc, and if the
                Move            FPU feature flag (bit 0) is also set,
                Instruction     supports the FCMOVCC and FCOMI instructions.
                Supported       Indicates whether the processor supports the
16      PAT     Page Attribute  Page Attribute Table. This feature augments
                Table           the Memory Type Range Registers (MTRRs),
                                allowing an operating system to specify
                                attributes of memory on a 4K granularity
                                through a linear address.
17      PSE-36  36-bit Page     Indicates whether the processor supports
                Size            4-Mbyte pages that are capable of addressing
                Extension       physical memory beyond 4GB. This feature
                                indicates that the upper four bits of the
                                physical address of the 4-Mbyte page is
                                encoded by bits 13-16 of the page directory
                                entry.
18 - 22         Reserved        Do not count on their value.
23      MMX     Intel           The processor supports the MMX technology
        Tech-   Architecture    instruction set extensions to Intel
        nology  MMX?technology        Architecture.
                supported
24      FXSR    Fast            Indicates whether the processor supports
                floating-point  the FXSAVE and FXRSTOR instructions for
                save and        fast save and restore of the floating-point
                restore         context. Presence of this bit also indicates
                                that CR4.OSFXSR is available for an
                                operating system to indicate that it uses
                                the fast save/restore instructions.
25 - 31         Reserved        Do not count on their value.

        Ciao... . SNF .
--
Steve 'Nephtes' Freeland | I definitely think second is


 
 
 

Cpuinfo Flags

Post by Daniel Fra » Fri, 10 Jul 1998 04:00:00




Quote:> Does anyone know where I can find out what the flags in "/proc/cpuinfo" mean?
> bogomips        : 39.94

        Hi! Sorry but I can't answer your question. Anyway I'd like to ask you
if you're using a p100? It's because I have a p100 and my last line is:

bogomips        : 39.73

        In the past, mine showed 39.94 too but one day I noticed that my jumpers
of the mainboard were incorrect. They're "50x2" instead of "66x1.5". I know
that 66x1.5 = 99 but it's better because the bus speed will go up to 66Mhz
instead of the 50Mhz. Anyway the processor speed will go down from 100Mhz to
99Mhz :( But I think "66x1.5"'s better and the correct configuration.
        So, "if you want" take a look at your mainboard and change these
settings. Please DO NOT overclock your system by putting "66x3" :P
        You'll feel a difference on the the speed of graphics :)
        But if you don't have a p100 then I don't know :(

        Bye!

--
http://members.xoom.com/danchapo
uin: 2238494

 
 
 

Cpuinfo Flags

Post by the nice gu » Fri, 10 Jul 1998 04:00:00







>:> Does anyone know where I can find out what the flags in "/proc/cpuinfo" mean?
>:
>:> bogomips        : 39.94
>:
>:   Hi! Sorry but I can't answer your question. Anyway I'd like to ask you
>:if you're using a p100? It's because I have a p100 and my last line is:
>:
>:bogomips        : 39.73

>Hi,

>Here, I have got a PowerEdge 2300 (DELL)
>It is a bi-PII 400Mhz
>Just now, it is just recognized as a mono-processor, and I have :
>processor       : 0
>...
>ccpu             : 686
>...
>bbogomips        : 396.49

>When it runs in fully bi-pros mode (with another kernel), my processors
>are seen as :
>processor       : 0
>&
>processor       : 1

>with a total of 792.stg bogomips

>So, I think it is linked with your internal frequency.

>Am I right ?

>It is very strange your P100 just have 40 bogomips ....

>HTH & TMTT (tell me the truth :D )

>Yannick.

>--
>================================================
>   Gouedard Yannick Etudiant ENSPS 2eme Annee
>         http://inforezo.u-strasbg.fr


bogomips are NOT scaleable from one type CPU to another...my 486 DX2-80 had I
believe around 72 bogomips and my p100 39.94 (running a 66x1.5)

--

tng

want to be a guru...READ the READMEs

 
 
 

Cpuinfo Flags

Post by Yannick Gouedard Etudiant ENSPS Promotion 19 » Sat, 11 Jul 1998 04:00:00





:> Does anyone know where I can find out what the flags in "/proc/cpuinfo" mean?
:
:> bogomips        : 39.94
:
:       Hi! Sorry but I can't answer your question. Anyway I'd like to ask you
:if you're using a p100? It's because I have a p100 and my last line is:
:
:bogomips        : 39.73

Hi,

Here, I have got a PowerEdge 2300 (DELL)
It is a bi-PII 400Mhz
Just now, it is just recognized as a mono-processor, and I have :
processor       : 0
...
cpu             : 686
...
bogomips        : 396.49

When it runs in fully bi-pros mode (with another kernel), my processors
are seen as :
processor       : 0
&
processor       : 1

with a total of 792.stg bogomips

So, I think it is linked with your internal frequency.

Am I right ?

It is very strange your P100 just have 40 bogomips ....

HTH & TMTT (tell me the truth :D )

Yannick.

--
================================================
   Gouedard Yannick Etudiant ENSPS 2eme Annee
         http://inforezo.u-strasbg.fr

 
 
 

1. fix up newer x86 cpuinfo flags.

According to Intel document 24161823.pdf[*] page 18, 'tm2' is misdefined.
Its bit 7 not, bit 8. Also add the missing 'EST' (Enhanced Speedstep Technology)
bit, and use the correct Intel terminology for the context ID bit.

[*] http://www.intel.com/design/xeon/applnots/241618.htm

diff -urpN --exclude-from=/home/davej/.exclude bk-linus/arch/i386/kernel/cpu/proc.c linux-2.5/arch/i386/kernel/cpu/proc.c
--- bk-linus/arch/i386/kernel/cpu/proc.c        2003-03-15 19:33:58.000000000 +0000

                NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,

                /* Intel-defined (#2) */
-               "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, NULL,
-               "tm2", NULL, "cnxt_id", NULL, NULL, NULL, NULL, NULL,
+               "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
+               "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
                NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,

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