Well, the 2 byte delay is because of the FIFO and transmit holding
register, but I digress. Just be aware that multimaster I2C on the
8xx family is so buggy as to be practically useless.
> > I have a 860P design where I am using SMC1 and SMC2 for UART and
> > SCC1 and SCC2 for ethernet.
> > Also on this board I will be using I2C only ONCE to read the SDRAM
> > and SEEPROM information after which I have no use of I2C.
> Then it might be easier to wave the PB26 and PB27 pins
> around yourself using a software emulation of I2C.
> If you don't, watch out - they may be a "two byte delay" required
> after transmits - maybe this is the 823 though.
> Search for "I2C" in this group on groups.google.com. You'll find
> at least 51 entries...
> Check the Errata. Even the 860 Rev C.1 has 8 I2C errata items!
> Tom Evans
"Never apply a Star Trek solution to a Babylon 5 problem." --FermiLab