>Well, the thing about it is, a 24 bit address bus (which is what the MC68000
Since all the original ST hardware designers are either dead
or serving life sentences deep in Siberia :-) :-) I'll take a stab
at it... My understanding is that the Shifter (video) chip wasn't
designed to address more than 4Mb [back in 1985, 4Mb was a REALLY
HUGE amount of memory - sorta like IBM making the max limit of the
PC 640K, since nobody could *ever* user that much memory!]. this
might also be the case with the other custom chips.
Several of the 12-mb hacks that I've heard about (and I've
used one of them) do away with this, but put a severe restriction
upon what you can do to the extra RAM - no DMA, no video, just code
and data. Not too bad if you're running GCC, but I'm sure that a
lot of the demos being tossed about would croak :-)
I'm not sure of the specifics, but what I've just described
sounds awfully like TT-Ram. It's just that on the TT, they figured
that since the custom chips couldn't get at the extra memory anyway,
they could go ahead and make CPU accesses to it much faster.
Because it wouldn't work. But seriously, you would need aQuote:>Hypothetical situation ... what if I had an STe (that uses SIMMs for
>its RAM). If I had the bucks, why couldn't I use 4MB SIMMS rather than
>256KB or 1MB SIMMS?? If I stuck in 4 4MB SIMMS, that would be 16MB of
>RAM, within the designed capabilities of the 68000 CPU!
new MMU chip, which might be a wee bit tough, since at least my STe
has his soldered to the motherboard :-(
Check out the SST accellerator. For under $1000, you canQuote:
>So the $68000 question is ... why can't the ST use it? Is it power?
>Physical size? Some design flaw? I WANT TO KNOW!!!
have a 50Mhz '030 system (assuming you can stand the 6-month wait
for the SST boards :-( You can fit up to 12 MB on the SST.
== "Martha, fetch my rifle - thar's another UCSD ECE undergrad!" ==